56,000+ tokens/sec at just 80 MHz. 🤯 I burned a full Transformer with KV cache into a custom chip. Designed gate by gate as a 100% digital integrated circuit. Prototyped on a FPGA. (No GPU. No CPU) Just pure digital silicon running @karpathy microGPT, spelling out names on a tiny LCD. This is GateGPT 👇

98%. That's the local win/tie rate for small models on chat - and it's a weighted average across 20+ occupational domains, not a cherry-picked slice. The "you still need the cloud for everything" assumption just got an expiration date. Huge congrats to you and the team. And getting the FT to run it? Even better 👏 Long live on-device intelligence!!!

Long live on-device intelligence. Real privacy, not brochure privacy

Genuinely inspired by @sarahookr's vision for AutoScientist by @adaption_ai Couldn't find official API docs, so I wrote up my own observations of the endpoints 👇 github.com/fguzman82/autosci…

Apple heard the community! 🗣️ Background Neural Engine access is BACK in the iOS 27 Public Beta. Huge win for on-device AI. Thanks to @argmax for fighting for it. On-device inference stays fast and efficient

I am pretty impressed what open source EDA tool can achieve already. This is an programmable instrumentation amplifier. And yes. Its design and the IHP PDK used is open source :-)

Learning computer architecture by building a full GPU from scratch. ▪️ 16-bit ISA & assembler ▪️ High-level programming language (J++) & compiler ▪️ Branch divergence & warp scheduling ▪️ 2 compute cores Running AI model inference at 81 MHz on a 30$ FPGA 🧵

The tokenizer isn't plumbing I've always suspected it was quietly deciding more than we admit, and Cohere Labs just put numbers on it. Train a tokenizer on more languages than you pretrain on, and the model inherits a plasticity you can't buy back later: - ~19% higher win rates on new languages - 8x faster adaptation - near-zero cost to the primary ones The part that stays with me is that you can't retrofit it. Swap the tokenizer in after pretraining and you're still 7% behind the model that got it right at step zero. The ceiling is set before the first gradient. It's the same pattern that's been nagging me for a while: the lottery is drawn early. Not the best architecture wins, the one your first decisions could still reach. Two things I keep circling: 1. Is the tokenizer actually free, or did we just move the cost into the embedding layer where it's easier to ignore? 2. Win rate can reward sounding right over being right. A model that sounds native in Nepali isn't necessarily reasoning in Nepali. How much of that gain is fluency, and how much survives hard tasks? 

Humans didn't design this. AI just invented radio chips no engineer would ever draw. A Princeton team fused reinforcement learning, inverse design, and diffusion models to discover entirely new RF circuit topologies. Real fabricated silicon (SiGe BiCMOS): a 34–70 GHz mm-wave PA hitting 21.2 dBm and 26% PAE, plus a 100–120 GHz sub-THz PA at 12.6 dBm. Design time: weeks → hours.

I burned a full Transformer into custom silicon. And Andrej Karpathy liked the project. ❤️ When someone whose work inspired your own takes a moment to notice it, every late night suddenly feels worth it. Back to building. ⚡

Hard agree. Agentic AI never bottlenecked on FLOPs - it's memory, routing and control flow. We over-fit silicon to dense matmul and called it progress: the hardware lottery. I burned a full Transformer into custom silicon to feel exactly where that breaks. The next 10x is co-design, not compute.

Built a full Transformer with KV cache in RTL, prototyped on a Virtex-5 FPGA microGPT at ~56k tokens/s. Thought this might interest you @pcuenq